If a negative surge or a voltage fluctuation occurs in a power line, supply voltage to a load circuit becomes negative voltage, and reverse current flows in the load circuit, so that breakdown may occur. As a conventional technique addressing such an issue, there is a technique described in PTL 1.
The technique described in PTL 1 is configured to divide supply voltage to a P-type FET provided between a power source and a load circuit, and to the load circuit, via a resistor, and to input intermediate voltage thereof to a gate of the P-type FET. The load circuit is protected in the following manner. When an input-side polarity is normally connected, the P-type FET enters an ON state to supply source voltage to the load circuit, and when the input-side polarity is reversely connected, the P-type FET enters an OFF state so that reverse polarity voltage is not applied to the load circuit.